Optimized Modular Multiplication for Supersingular Isogeny Diffie-Hellman
نویسندگان
چکیده
منابع مشابه
Efficient Algorithms for Supersingular Isogeny Diffie-Hellman
We propose a new suite of algorithms that significantly improve the performance of supersingular isogeny Diffie-Hellman (SIDH) key exchange. Subsequently, we present a full-fledged implementation of SIDH that is geared towards the 128-bit quantum and 192bit classical security levels. Our library is the first constant-time SIDH implementation and is up to 2.9 times faster than the previous best ...
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In this paper, we present three side-channel attacks on the quantum-resistant supersingular isogeny Di e-Hellman (SIDH) key exchange protocol. These re ned power analysis attacks target the representation of a zero value in a physical implementation of SIDH to extract bits of the secret key. To understand the behavior of these zero-attacks on SIDH, we investigate the representation of zero in t...
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Since its introduction by Jao and De Feo in 2011, the supersingular isogeny Diffie-Hellman (SIDH) key exchange protocol has positioned itself as a promising candidate for post-quantum cryptography. One salient feature of the SIDH protocol is that it requires exceptionally short key sizes. However, the latency associated to SIDH is higher than the ones reported for other post-quantum cryptosyste...
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In this paper, we investigate the e ciency of implementing a post-quantum key exchange protocol over isogenies (PQCrypto 2011) on ARM-powered embedded platforms. This work proposes to employ new primes to speed up constant-time nite eld arithmetic and perform isogenies quickly. Montgomery multiplication and reduction are employed to produce a speedup of 3 over the GNU Multiprecision Library. We...
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To the best of our knowledge, we present the first hardware implementation of isogeny-based cryptography available in the literature. Particularly, we present the first implementation of the supersingular isogeny Diffie-Hellman (SIDH) key exchange, which features quantum-resistance. We optimize this design for speed by creating a high throughput multiplier unit, taking advantage of parallelizat...
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ژورنال
عنوان ژورنال: IEEE Transactions on Computers
سال: 2019
ISSN: 0018-9340,1557-9956,2326-3814
DOI: 10.1109/tc.2019.2899847